1. Field of the Disclosure
This disclosure relates to a flat panel display device with oxide thin film transistors and a method for fabricating the same.
2. Description of the Related Art
Image display devices used for displaying a variety of information on a screen are one of the core technologies of the information and communication era. Such image display devices have been being developed to be thinner, lighter, and more portable, and furthermore to have a high performance. Actually, flat panel display devices are spotlighted in the display field due to their reduced weight and volume, well known disadvantages of cathode ray tubes (CRTs). The flat panel display devices include for example, OLED (organic light-emitting diode) devices which display images by controlling the light emitting quantity of an organic light emission layer.
The OLED devices are self-illuminating display devices employing a thin light emission layer between electrodes. As such, the OLED devices can become thinner like a paper. Such OLED devices display images by emitting light through an encapsulated substrate. The encapsulated substrate includes a plurality of pixels arranged in a matrix shape and each configured with 3 colored (i.e., red, green and blue) sub-pixels, a cell driver array, and an organic light emission array.
In order to realize a variety of colors, the OLED device employs organic light emission layers which are configured to emit red, green and blue lights, respectively. The organic light emission layer is interposed between two electrodes and used to form an organic light emission diode.
The OLED device requires a thin film transistor which can be driven faster. To this end, the OLED device uses an oxide film, such as an IGZO (indium gallium zinc oxide) film, instead of amorphous silicon film.
FIG. 1 is a planar view showing the structure of a pixel within a flat panel display device according to the related art. FIG. 2 is a cross-sectional view showing the pixel structure taken along a line I-I′ in FIG. 1.
Referring to FIGS. 1 and 2, the flat panel display device of the related art includes a plurality of gate lines 11 and a plurality of data lines 13. The gate lines 11 and the data 13 crossing each other define a plurality of pixel regions. A pixel electrode 9 and a common electrode 25 are disposed within each of the pixel regions.
Also, a thin film transistor TFT is disposed at an intersection of the gate and data lines 11 and 13. The thin film transistor TFT includes a gate electrode 1, a gate insulation layer 12, a channel layer 14, a source electrode 15 and a drain electrode which are formed on a substrate 10. The drain electrode is directly connected to the pixel electrode 9 within the pixel region.
Moreover, in a structure that a common electrode 25 is formed over the pixel electrode, a common line 26 is formed on all regions except the pixel region and in a single body with the common electrode 25. In other words, the common line 26, which is formed in a single body united with the common electrode 25, overlaps with the thin film transistor TFT, the gate line 11 and the data line 13 within a non-display region. Meanwhile, an opening OP is formed by removing a part of the common line 26 opposite to the channel layer 14 of the thin film transistor TFT, in order to prevent the generation of a parasitic capacitance.
The thin film transistor used in a driver circuit of the flat panel display device such as an OLED device is required to have very high-speed response characteristics. As such, the channel layer 14 is formed from an oxide material, such as indium gallium zinc oxide IGZO, instead of amorphous silicon (a-Si:H).
When the channel layer 14 is formed from an oxide material, a SiO2-based insulation film is used for the formation of the channel layer 14 in order to enhance characteristics of the channel layer 14. That is, if the channel layer 14 is formed from a material having oxide, an insulation layer such as a gate insulation layer or a passivation layer is formed of a SiO2-based material, so as to enhance characteristics of the channel layer 14
However, the SiO2-based insulation film has lower taper and interface characteristics compared to the SiNx-based insulation film. Due to this, faults are often caused when the SiO2-based insulation film is stacked. For example, the SiO2-based insulation film has an un-uniform thickness or is disconnected in a step coverage region.
Such an un-uniform thickness or a disconnection in the step coverage region occurring in corners of the gate electrode 1 of the thin film transistor TFT and edges of the gate line 11 may cause a short circuit fault to be often generated in regions A and B.
In A-region of FIG. 1, for example, the gate line 11 and the gate electrode 1 each have a thickness of about 2000˜2500 Å, the passivation layer 19 formed from a SiO2-based material has a thickness of about 600˜800 Å, and the pixel electrode 9 or the common electrode 25 has a thickness of about 400 Å.
Because the passivation layer 19 formed from the SiO2-based material has a poor taper characteristic, a disconnection fault of the passivation layer 19 is generated in an edge of the gate electrode 1 crossing the source electrode 15. Due to this, the common line 26 formed over the thin film transistor TFT may be electrically shunted with the data line 13 or the source electrode 15, which is disposed under the common line 26.
Also, for example, a disconnection in the gate insulation layer 12, which is formed from a SiO2-based material, may cause the gate electrode 1 and the gate line 11 to be electrically shunted with the source and drain electrodes, the data line 13 and the common line 26 which cross the gate electrode 1 and the gate line 11. Particularly, the gate electrode 1 and the gate line 11 become thicker than those of the insulation film and the other electrodes. As such, the gate insulation layer 12 formed from the SiO2-based material is easily disconnected in the step coverage region.